A marriage of convenience
Article Abstract:
Manufacturers of complex programmable logic devices (PLD) and field-programmable gate arrays (FPGA) are searching for ways to marry the two technologies into one package to make it easier for their OEM customers to design products. Lucent Technologies is offering pre-packaged functions in software cores and is poised to introduce a field programmable systems chip (FPSC), a hardwired hybrid, as part of its ORCA product line. The company considers both software and hardware macros necessary to avoid redesigning gate devices repeatedly. One of its customers, Cascade Commuications, welcomes the development of Lucent's hardwired hybrid devices because they ensure reusability and work faster. Other PLD makers, such as Altera, have not had much success with hardwired hybrids, however. Altera's Buster, which offered a fixed bus interface section with field programmability, was a bust.
Publication Name: Electronic Business Today
Subject: Electronics and electrical industries
ISSN: 1085-8288
Year: 1997
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chip, test thyself
Article Abstract:
Semiconductor vendors are producing single-chip systems, but questions concerning reliability and affordable testing remain. Test concerns have risen as integrated circuits (IC) continue to increase in complexity. The system-on-a-chip has compounded the problems because they frequently contain technologies from a variety of vendors. Several electronic design automation (EDA) vendors are promoting the built-in self-test (BIST) approach as a solution. The BIST approach embeds tester functions in a controller on the chip. A low-cost external tester examines random test patterns generated by the controller and evaluates the results. The technique can provide continual monitoring at the board or system level through the use of ASICs or FPGAs.
Publication Name: Electronic Business Today
Subject: Electronics and electrical industries
ISSN: 1085-8288
Year: 1997
User Contributions:
Comment about this article or add new information about this topic:
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