Modeling the wiring of deep submicron ICs
Article Abstract:
Today's deep-submicron chips demand a reworking of design tools and methodologies because performance is now dependent on the interconnect rather than the transistor. Timing is crucial to ensuring that performance targets are met because a lack of good timing predictions leads to untrustworthy simulation results and 'blind' efforts to achieve timing closure. Traditional 3-D analysis fails to take the interconnect characteristics most important in signal timing into account; designers need an accuracy approaching the level of fields solvers but obtainable in far less time. Conventional modeling uses an equation-based process with extractors and multidimensional curves that extrapolate from 2-D. Pattern-matching with derivative formula allows for a faster topological distribution analysis.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 2000
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A new species of hardware
Article Abstract:
Evolvable hardware mimics Darwinian evolution to adapt itself to changing tasks. Evolutionary computation is essentially done in software using algorithms based on genetics and typically run on conventional hardware as a simulation, but such algorithms can be embedded directly into hardware to create evolvable hardware. This type of computation departs radically from classical design to let the computer search a 'space' of all possible designs automatically. Researchers Jason Lohn and Silvano Colombano at NASA-Ames Research Center developed a novel algorithm for evolving analog circuits. Adrian Thompson of Universityh of Sussex in England evolved an onboard robot controller for a simple off-line application. Growth opportunities include ontogeny and embryonics.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 2000
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Champagne supercomputer on a beer budget
Article Abstract:
The 1998 winner of the Gordon Bell prizes at the High Performance Networking and Computing Conference was a group of physicists from Columbia Univ. and collaborators from four other institutions. They made a supercomputer with 12,288 processor nodes for only $1.85 mil. It is at Riken Brookhaven Research Center and its peak performance is 0.6 trillion floating-point operations/sec (Tflops). The computer simulates behavior of elementary particles and is intended for exploration of the first picoseconds of the universe. In structure the computer reflects the nonlinear physics it is to simulate. When calculating, each node communicates only with the nearest neighbors. For booting up or transfering data/programs there are other links.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 1999
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