Lithography past..

Article Abstract:

Optical lithography in the semiconductor technology has progressed substantially from 1978, when mirror projection aligners called scanners were being considered as alternatives for contact aligners. At that time, 3-micrometer features typically patterned 75 mm wafers with 900 nm overlay and 300 nm critical dimension (CD) control specifications, and chips were sold at $1,000/Mb at sizes of 18 sq mm. In the present chip prices have declined to $4/Mb, sizes have grown by 1,500%, and lay and CD control specs have grown smaller by 1,200%. In addition, optical lithography is being extended by an order of magnitude to 100 nm, and non-optical technologies are now being seriously considered.

Silicon Wafers, Semiconductor wafers

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Dual-damascene overcoming process issues

Article Abstract:

A discussion of the primary damascene techniques under study and in production and other related processing issues is presented. Dual- damascene is considered an outstanding technique of inlaying metal for interconnects and were created when a practical copper etch method could not be developed. Despite problems encountered in copper dual-damascene, it has lessened complexity and reduced real process times.

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Near half-lambda contacts with 248 nm

Article Abstract:

MicroUnity and National Semiconductor Corp combined high transmission attenuated phase shift mask (APSM) and OPC technologies to develop dense arrays of near half micron contacts at 140 nM based on 248 nm illumination. An 18% transmission APSM mask is considered a viable solution for contacts. However, these masks still pose several manufacturing problems.

Integrated circuits, MicroUnity

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