A parallel architecture comes of age at last
Article Abstract:
Supercomputers like the Cray-1, NEC-SX-2, and the Fujitsu VP-200 are about to reach their technological limit of about three gigaflops (billions of floating-point operations per second). Scientific and engineering problems in fields such as fluid dynamics, computational chemistry, geophysical modeling, and aerodynamics are expected to require processing speeds in excess of that limit. By having several processors working in parallel, rates in the teraflop range (trillions of floating-point operations per second) are theoretically possible. The hypercube topology is the most popular architecture to date for large-scale parallel computers; more than 100 hypercubes are in use, mainly at government laboratories and academic institutions. The technology is moving toward high-performance, 32-bit node processors, bigger memories on each node, and higher dimensions.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 1987
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The versatility of digital signal processing chips
Article Abstract:
Echo suppressing in long-distance telephone calls routed via satellite is troublesome. Conventional echo suppressors do not work well on satellite circuits due to their inherent long propagation delays. Filters used so far for echo cancellation are too large and expensive, but using a special microprocessor that executes digital signal processing (DSP) allows an echo suppressor to fit on a small circuit board. DSP circuits can also be used in speech recognition and compression, radar, medical imaging, and other applications. Selecting a DSP circuit is complicated because the product is available only from a single manufacturer, very few secondary manufacturers are licensed by major semiconductor firms to make DSP chips, and just a limited number of devices have been certified by the US Department of Defense.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 1987
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Testability on TAP: testing loaded digital logic boards becomes much easier with a standard test access port, or TAP, meant for boundary-scan tests
Article Abstract:
A way to test loaded digital printed-circuit boards which uses a technique called 'boundary-scan' provides access to input and output pins of an integrated circuit (IC) by including standardized circuitry on each IC. What is especially significant about this technique is not boundary-scan itself, which is not new, but the fact that a standard is now established for it. The standard is designated ANSI/IEEE Std 1149.1, and products that incorporate it already are appearing. These products are only the first indications of a revolutionary change that is likely to change the way all testing is done.
Publication Name: IEEE Spectrum
Subject: Engineering and manufacturing industries
ISSN: 0018-9235
Year: 1992
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