Adding error-correcting circuitry to ASIC memory

Article Abstract:

Memory circuits for detecting and correcting errors can increase the reliability of application specific integrated circuit (ASIC) devices. Adding error-correcting code (EEC) circuitry means chip yields are higher because errors caused by single-cell processing defects are corrected. In an embedded DRAM, a memory cell can be smaller because it does not need to survive every alpha particle hit. How correcting circuitry works is explained.

Integrated Circuits, Application-specific integrated circuits, Application-specific integrated circuit, Application specific integrated circuits

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Chip detectives

Article Abstract:

Reverse engineering originally connotated piracy of intellectual property in the 1960s and '70s because some companies used it to copy competitors' technologies. Today, the semiconductor industry is finding new uses for reverse engineering. For example, its procedures are being used to defend companies' patents and to trace sources of problems.

Semiconductor Devices, Usage, Intellectual property, Copyrights, Patents, Patent/copyright issue, Reverse engineering

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Fine-tuning memory macros using variable internal delays

Article Abstract:

Embedded memory blocks, or memory macros, can be optimized for specific applications running at different speeds by designing in delays that are variable and/or programmable. This also facilitates debugging initial hardware when a memory macro will not function due to insufficient internal delay. Memory macros work via internal pulses generated in the appropriate number, sequence and relationship by the internal timing chain. Adding a set of circuits mimicking the operation of the primary circuits allows the timing chain to be interlocked with the circuitry being driven. An extra row and column of memory cells, an extra row circuit and an extra column discharge circuit are in the added circuitry: the extra cell row generates the actual row line delay used by the timing chain; the extra cell column does the same in the bit direction; the extra row circuit the same for the row circuitry; and the column discharge circuit duplicates the devices in a regular memory cell that discharge the bit line.

Science & research, Equipment and supplies, Integrated circuit design, Circuit design, Embedded systems, Embedded system, Memory (Computers)

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